Mertens – MalamTeam is hiring a Verification Engineer for a leading organization in Holon

Role Overview

Develop FPGA verification environments using UVM methodology for advanced projects involving signal processing, controllers, and more. The role includes designing and implementing verification environments from Block Level to Full-Chip, collaborating with FPGA development, systems engineering, and algorithm teams.

Requirements

• 5+ years of Verification experience, from Test Plan definition to Coverage

• Hands-on experience with UVM methodology and SystemVerilog

• Experience developing FPGA/ASIC verification environments at Block and Full-Chip levels

• Strong RTL debugging skills, from Block to System Level

• B.Sc. in Electrical Engineering, Electronics Engineering, or Computer Science