About The Role
Majestic Labs builds power-efficient AI servers for the largest and most advanced AI workloads.
We are looking for a Senior Architect to work on simulation and translating architectural ideas into quantitative, defensible performance models.
This role is ideal for someone who lives at the intersection of:
- Computer architecture
- Workload characterization
- System-level modeling
- AI / data-intensive workloads
What You’ll Do
- Performance simulator & translate workloads into models
- Extend and maintain system-level performance models (compute, memory, interconnect, scheduling).
- Model system behaviors: NUMA effects, contention, coherence, bandwidth saturation.
- Characterize real workloads (LLMs, GNNs, graph analytics, tabular models and more).
- Guide architectural decisions
- Evaluate architectural trade-offs
- Produce quantitative comparisons vs. existing and emerging AI platforms.
- Work closely with hardware architects, compiler/runtime teams, and external partners.
- Ensure simulator assumptions align with hardware and software reality.
- Support external conversations
- Contribute to technical deep dives with strategic partners and customers.
- Help translate performance modeling into clear narratives for execs and investors.
Requirements:
Required
What We’re Looking For
- BSc in CS, EE, CE or similar degrees plus 8 years experience in computer architecture, systems research, or performance engineering. Or PhD in CS, EE, CE or similar degrees plus 2 years of relevant experience.
- Strong background in performance modeling or simulation (analytical, event-driven).
- Experience with AI or graph workloads.
- Understanding of: memory hierarchies (NUMA, caches, coherence), Interconnects (PCIe, fabrics, RDMA-), GPU-based systems.
- Hands-on coding experience (Python, C/C++, or similar).
- Ability to reason from first principles, not just benchmarks.
Strong Plus
- Background in architecture simulators ( gem5-like, in-house tools, or research frameworks).
- Exposure to ML runtimes, compilers, or hardware-aware model design.
- Research background (MS/PhD) in computer systems (CS/EE), architecture, or related fields.