Who Are We?

GuardKnox offers high-performance computing and firmware solutions that empower automotive manufacturers and main suppliers to develop modern automotive E/E architectures and deliver the next generation of Software Defined Vehicles.

GuardKnox’s solutions provide the necessary innovation for the automotive market to enable drivers with customization and personalized vehicle experience - essentially bringing about the ‘Smartphonization’ of vehicles. Our technology serves the needs of automotive for dynamic and adaptive technological capabilities in the evolving automotive market.

Our pioneering approach to software-defined and service-oriented vehicles gives our customers the tools to meet the demands of today’s drivers – and to keep meeting them tomorrow. We call it The Freedom to Evolve.

An integral part of GuardKnox product development is the hardware development team. This team is responsible for the core hardware and logic design which powers GuardKnox embedded solutions. The Senior FPGA Design Engineer will be responsible for high reliable real-time FPGA logic development as well as hardware design, including design of low-level drivers and conversion from code to logic.

Responsibilities Include:

• High reliably FPGA logic development
• Design of system architecture and data flow on a SOC with processors and FPGA logic
• Design high-performance pipeline architectures
• Integration of soft-core IP controllers
• Transition of functionality from software to FPGA logic
• IP’s selection and integration
• Run basic verification tests (on simulations)
• Work on target integration and testing
• Development in accordance with safety and cybersecurity standards
  
  

Requirements:

• Bachelor’s degree in Electrical Engineering, Software Engineering or Computer Science
• 4 years of experience as hands-on with FPGA development
• Experience with VHDL/Verilog (System Verilog – Advantage)
• Hands-on experience with synchronous and high-performance pipeline architecture
• Experience with block-level verifications
• Familiarity with Xilinx/ALTERA/Lattice FPGA architecture