Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in analog mixed signal and high-speed Input/Output development.
• Experience defining and taking to High Volume Manufacturing(HVM) leading edge mixed-signal or high-speed IO designs.
  
  

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science.
• Experience in mixed-signal and high-speed Input/Output (IO) solutions.
• Experience working on high-performance, data-center class IP, from concept through high-volume deployment.
  
  

About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will work to shape the future of the Data Center silicon. Our portfolio spans CPU, TPU, Networking and other key data center technologies, which power Google's most demanding Compute and AI/ML applications. You will be a key contributor in the growth team, developing advanced custom IP and solutions. We seek experienced applicants with expertise in one or more of the following areas: wireline communications, analog circuit design, DSP design and algorithms, signal integrity, transmission line theory, advanced analog and mixed-signal modeling, high-speed clocking, Clock and Data Recovery (CDR), equalization, high-speed IO industry standards. You will collaborate with a set of cross-functional organizations. You will serve many of Google’s advanced data center products.The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities

• Architecture and design of high-speed analog/digital circuits (ADC, DAC, PLL, CDR, DSP), including optimizing for Power, Performance, and Area (PPA).
• Model and simulate channel behavior (S-parameters), signal integrity, and jitter using tools like MATLAB.
• Bring up new silicon, characterizing performance, and testing for electrical compliance in lab environments.
• Work with packaging, board design, and firmware teams to ensure integration into System-on-Chips (SoCs).
• Adhere to standards like Institute of Electrical and Electronics Engineers(IEEE) or Optical Internetworking Forum (OIF) for protocols and optimizing power consumption.
  
  
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .