SW Engineering Manager – Performance Modeling

Speedata is modernizing analytics infrastructure with the first purpose-built ASIC processor, the Analytics Processing Unit (APU), for analytics and AI data workloads. Delivering up to 100x faster Apache Spark performance while cutting infrastructure TCO by 90%, the APU executes analytics operations directly in silicon with seamless integration and no code changes.

We’re looking for an experienced SW Team Manager to join our Simulators Team, where you'll lead the design and development of our hardware simulators - functional and performance models that serve as the source of truth, drive architectural exploration and compiler optimization.

Our simulators model diverse cores within a cutting-edge SoC designed to accelerate Big Data and Database Analytics.

You will collaborate closely with hardware and software teams, contributing to co-design efforts that influence architecture, tooling, and system-level behavior.

Requirements

• BSc (or higher) in Computer Science, Math, Physics or Electrical Engineering.
• 3+ years of experience managing or leading software engineering teams
• 5+ years of experience developing hardware simulators
• Strong understanding of computer architecture and system-level modelling.
• Proven track record in technical leadership.
• Experience in SW-HW co-development environments, influencing both architecture and tooling.
• Proficiency in Python and C++.
• Solid software engineering skills, including design, testing, performance tuning, and maintainability.

Responsibilities

• Lead & grow a team of experienced engineers
• Develop new hardware simulators and continue evolving existing one.
• Collaborate with Architecture, VLSI, and Software teams to drive co-design initiatives.
• Provide insights that influence chip architecture, compiler optimization, and system-level performance.
• Develop tools that drive the chip development cycle.