Sentrycs’ mission is to enable a more drone-empowered future!

How?

With our integrated counter-drone solution, we support law enforcement agencies, prisons, critical infrastructures, airports, mass events, convoys, militarizes, and more, by providing them with 24/7 drone protection. With our fully autonomous, easily portable, and UTM-ready technology, detecting and mitigating unauthorized drones has never been simpler.

We work to keep society protected from unauthorized eyes in the skies so you can remain operational and ensure business continuity on the ground. Let’s build a drone-empowered future together!

We are seeking a talented and experienced FPGA ENGINEER (at least 7 years of relevant experience) to join our small and highly skilled team.

The successful candidate will be responsible for the entire lifecycle of FPGA development—from initial specification and RTL coding to hardware integration and timing closure. As a Xilinx specialist, you will leverage the latest Vivado and Vitis tools to push the boundaries of what our hardware can achieve.

In this role, you will:

• Create scalable FPGA architectures and high-performance digital logic designs for Xilinx UltraScale+ and Versal ACAP platforms to meet rigorous system requirements.
• Use the Xilinx Vivado and Vitis design suites to manage the full development lifecycle, including advanced floor planning, complex timing closure, and hardware-in-the-loop debugging with ILA.
• Write optimized, synthesizable SystemVerilog/Verilog RTL and automated Tcl scripts to streamline build processes and ensure robust, high-throughput data processing.
  
  

You will be expected to work independently and collaboratively in a team environment, should have excellent problem-solving skills and attention to detail, as well as strong debugging and profiling skills.

Requirements:

The ideal FPGA engineer who we are looking for should have

• Xilinx Mastery: Extensive experience with Xilinx UltraScale+, Zynq SoC/MPSoC, or Versal ACAP families.
• HDL Proficiency: Expert-level knowledge of SystemVerilog and/or Verilog.
• High-Speed Interfaces: Proven experience implementing high-speed protocols (e.g., PCIe, NVMe, 10/40/100G Ethernet, or JESD204B/C).
• Digital Signal Processing: Strong understanding of DSP slices and implementing algorithms (FFTs, Filters) within the FPGA fabric.
• Excellent problem-solving skills and attention to detail.
• Strong technical knowledge and passion to learn more.
• Strong teamwork and communication skills.
  
  

Nice to have:

• HBM2/3 Integration: Experience managing High Bandwidth Memory (HBM) to solve memory bottleneck issues in data-heavy applications, or high-speed protocols such as 100G/400G Ethernet.
• PCIe Gen 5 & NVMe: Deep knowledge of the PCIe stack, including DMA engine optimization and NVMe controller IP.