DevJobs

Functional PCIe Silicon Validation Engineer, Google Cloud

Overview
Skills
  • C++ C++ ꞏ 3y
  • Embedded C ꞏ 3y
  • PCIe protocol
  • Physical Layer design
  • Emulation
  • Firmware
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.

Minimum qualifications:

  • Bachelor's degree in Electronic Engineering or Computer Engineering, or equivalent practical experience.
  • 3 years of experience in embedded C/C++ code development.
  • Experience with PCIe protocol like transaction, data link, PHY logical layers.
  • Experience in Physical Layer (PHY) design and development.

Preferred qualifications:

  • Experience in PCIe compliance measurements using high-end equipment (e.g., Analyzer, Exerciser).
  • Experience in lab equipment for PCIe testing including physical and protocol level.

About The Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will join a Peripheral Component Interconnect Express (PCIe) team and take ownership of post-silicon and pre-silicon validation efforts. You will ensure the Internet Protocol (IP) meets Google's standards while collaborating with cross-functional teams and external vendors.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

  • Lead or co-lead the PCIe sub system post-silicon logic validation process, including planning, methodology development and co-ordinating with emulation, firmware and testing teams.
  • Participate in both emulation and post-silicon validation phrases by designing, implementing and excuting tests and tools.
  • Drive the debugging and resolution of complex silicon issues, collaborating with cross-functional teams across design, architecture, software and firmware.
  • Analyze validation data to identify trends and root causes and to uncover opportunities for enhancing silicon quality, reliability and performance.


Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
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