DevJobs

Verification Engineer

Overview
Skills
  • Specman
  • System Verilog
  • UVM

We are looking for a brilliant Verification engineer that can quickly join a promising and exciting startup company to take part in and contribute in developing a complex and challenging chip for the Data Center.

Culture and atmosphere of the company is top innovative, technically challenging and super pleasant.


Required Experience:

  • 3-5 years of chip design verification development
  • Experience in logic design, verification and debug
  • Knowledgeable in frontend verification tools


Required Skills:

  • Strong technical skills
  • Quick learner
  • Independent
  • Good communications skills
  • Extensive knowledge in System Verilog or Specman is a must
  • Knowledge in advanced verification methodologies (UVM etc.) – an advantage


Required Education:

BSEE/MSEE

Xsight Labs