We’re looking for FPGA (FW logic design) Team leader to join our team and be responsible of FPGA team

:Main responsibilities

Managing FPGA teamResponsible of the team professional development and trainingResponsible of the team design development processesHands-on FPGA development

:Requirements

B.Sc. in EE EngineeringAt least 6 years FPGA designer with experience in synthesis, place and route and timing complianceProven experience of VHDL logic design principles along with timing, area and power implicationsExperience with creation of complex designs including coding and integration of 3rd party IPsExperience with verification methodologies, RTL and gate-level simulationExperience with lab FPGA debugging methodologies such as ChipScope / SignalTapExperience with lab debugging equipment like oscilloscopes and logic analyzersExperience with common high-speed interfaces implementationExperience with leading a design team or any other management experienceExperience with Xilinx and MicroSemi FPGAs & SoC-based designs is advantageExperience with Xilinx and MicroSemi FPGA-embedded processors is advantageExperience with video processing algorithms implementation is advantageExperience with high-speed interfaces implementation such as: DDR3, DDR4, Ethernet, MIPI is advantage

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