What You'll Do

You'll be joining our Front-End Design team at Cisco Silicon One, which is at the center of the silicon development at Cisco. Our engineers deal with all chip design aspects: definition, architecture, micro-architecture, design, verification, signoff and validation.

We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.

Who You'll Work With

You'll be joining our Cisco Silicon One group which is the center of Cisco’s ASIC design. You'll be part of our Group driving our game-changing next-generation network devices - Cisco Silicon One™. Our unique team works in a startup atmosphere inside a stable and leading corporation. Our design center is very unique - hosting all silicon HW and SW development disciplines inside one site.

We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all Cisco's future routing products.

Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale, or feature flexibility. Cisco Silicon One™ is a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!

Learn more about us right here:

[1] https://www.cisco.com/c/en/us/solutions/service-provider/innovation/silicon-one.html

[2] https://fortune.com/2019/12/11/cisco-ceo-chuck-robbins-chips/?_lrsc=ce750ac5-11c8-4995-bfd3-936de1c06009&dtid=osolin001080

[3] https://www.calcalist.co.il/internet/articles/0,7340,L-3775619,00.html

[4] https://www.youtube.com/watch?v=YRJuFrZC-GE&list=PLFT-9JpKjRTA0aqRbr5sR2iiaqVtK6Wf0&index=1

[5] https://blogs.cisco.com/sp/five-principles-at-the-heart-of-cisco-silicon-one?_lrsc=6c2b8b61-b513-4457-bdc9-12b9f9ecef45&dtid=osolin001080

Who You Are :

B.Sc/M.Sc in EE from a top university with a GPA above 85RTL designer with 5-10 years of experience

Experience in DSP logic – Must

Experience in Matlab simulations and Bit Exact environments

Familiar with UVM and functional testing

Familiar with mixed Signal systems/environments

Knowledge & experience with Clock Domain Crossing

• We are looking for exceptional individuals to join our team, experience in logic design or networking is not a must. You should be eager to learn and succeed!