DevJobs

FPGA Engineer

Overview
Skills
  • C C
  • C++ C++
  • Python Python
  • Networking Networking ꞏ 5y
  • FPGA design ꞏ 5y
  • Hardware bring up and debug
  • RTL design
  • Simulation and verification test benches
  • Synthesis
  • Timing closure
  • Intel Soc
  • Scripts
  • System Verilog
  • TCL
  • UVM verification flow
  • Xilinx
Job Description

We are looking for an FPGA engineer, to Join our FPGA team in developing next generation backhaul communication systems.

In this role you will be required for:

  • All aspects of FPGA design activity: Coding, Synthesizing, verification support and LAB bring up.
  • Participate in System definitions for current and next generation products.

Collaborate with other teams: SW, QA, and Radio ASIC.

Job Requirements

  • B.Sc. degree from a leading university.
  • 5+ years’ experience as an FPGA designer (Intel,Xilinx)
  • 5+ years’ Experience with networking.
  • Practical knowledge of RTL design, synthesis, timing closure, simulation and verification test benches.
  • Hardware bring up and debug experience.
  • Experience with Xilinx/Intel Soc – advantage.
  • Familiarity with high level programming languages like C/C++, System Verilog, Scripts (TCL, Python) – advantage
  • Excellent system understanding & strong analytical and problem solver abilities.
  • Experience with UVM verification flow – advantage.
  • Team player.
  • High motivation to excel.
Ceragon Networks