NextSilicon is a swiftly growing unicorn startup that is reimagining high-performance computing. Our pioneering coprocessor vastly accelerates supercomputers, driving them forward into a new generation. Our new software-defined hardware architecture enables HPC to fulfill its promise of breakthroughs in all fields of advanced research.
NextSilicon is looking for a talented and experienced software technical lead engineer to help develop the company’s key product.
In this role you will work in multiple layers of the SW stack including toolchain, driver, and runtime optimization algorithms. You will be dealing with innovative and challenging system architecture and will develop multidisciplinary skills by traversing multiple domains.
Overall, you will gain a deeper understanding of the heart of computing architecture.
Requirements:
- Bachelor’s or Master’s degree, and/or equivalent experience in computer science or a related field is preferred
- 10+ years of software engineering experience
- Strong knowledge of processor architecture - CPU, GPU, DSP and/or TCU
- Solid experience in tech leading software teams through various stages of technology development - discovery, concept, design and implementation
- Excellent Software architecture and C/C++ programming skills
- Previous experience working on large codebase projects which reached production
- A genuine passion for fixing software and hardware issues
- Demonstrated creative and critical thinking capabilities
- Deep understanding of operating systems foundations - Device Management, Memory Management, IPC, and Runtime is an advantage
Responsibilities:
- Lead part of the development of the company’s core product: a full-stack supercomputer coprocessor solution, including low-level SW, a compiler, and runtime optimization.
- Define feature development scope and plan for successful product delivery.
- Design SW from scratch using knowledge from multiple disciplines and programming languages.
- Understand and learn a full system feature end-to-end and implement it in multiple SW layers.