Key responsibilities:

• Research and development of modem algorithms
• Active participation in system design and news modem architecture
• Define FPGA micro-architecture
• FPGA implementation in RTL
• Validation and enhancement of existing modem IP
• Writing technical documents, testing and interfaces
• Simulation in Python and System-Verilog
• Design verification and integration

Requirements:

• At least M.Sc. in Electrical Engineering in the field of digital signal processing
• Relevant experience in wireless communication and digital signal processing/modem development
• Experience in algorithm development in python and SV
• Experience in writing advanced simulations using SV and Python
• Experience with Xilinx design flow and tools (Vivado ,SDK) - advantage
• Experience with lab testing equipment for communication systems
• Excellent collaboration and communications skills
• Ability to work in a dynamic environment