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Embedded Systems Engineer#231217

Overview
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Dev TypeEmbedded
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Experience15 years
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LocationRehovot
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Education B.Sc
About Me
About me: Hands-on engineer with expertise in embedded low-level software and hardware acceleration, SW/HW co-development, and parallel, distributed, and decentralized systems. Experienced in cloud computing, Monte Carlo simulations, and low-latency optimizations. Holds an M.Sc in CS, MBA, Financial engineering, B.Sc. in Physics and Computer Science and has published theoretical results. Open to new technologies and industries, with a strong emphasis on multidisciplinary thinking.
Skills (72)
  • Assembly Assembly ꞏ 9y
  • C C ꞏ 8y
  • Python Python ꞏ 8y
  • C++ C++ ꞏ 5y
  • TypeScript TypeScript ꞏ 4y
  • Perl Perl ꞏ 3y
  • Pandas Pandas ꞏ 4y
  • Android Android ꞏ 4y
  • iOS iOS ꞏ 4y
  • RESTful API RESTful API ꞏ 4y
  • Microservices Microservices
  • AWS AWS ꞏ 4y
  • multithreading ꞏ 6y
  • low-latency non-blocking ring buffers ꞏ 4y
  • memory hierarchies ꞏ 4y
  • parallel/multi-processor operations ꞏ 4y
  • online statistical analysis ꞏ 4y
  • data transfers ꞏ 4y
  • HW accelerators ꞏ 4y
  • memory management ꞏ 4y
  • AWS SaaS ꞏ 4y
  • TI toolchain ꞏ 4y
  • RISC architectures ꞏ 4y
  • SIMD vector processing ꞏ 4y
  • GPU ꞏ 4y
  • accumulators library ꞏ 4y
  • PoC ꞏ 4y
  • cloud native queueing gateway ꞏ 4y
  • concurrency control ꞏ 4y
  • API queries ꞏ 4y
  • AWS microservices ꞏ 4y
  • serverless framework ꞏ 4y
  • IoT ꞏ 4y
  • TI Launchpad HW ꞏ 4y
  • AWS cloud ꞏ 4y
  • multithreaded library ꞏ 4y
  • Monte Carlo library ꞏ 4y
  • C++11/14 ꞏ 4y
  • Boost ꞏ 4y
  • stoch generators ꞏ 4y
  • real time image processing ꞏ 4y
  • post-silicon validation tools ꞏ 3y
  • config management ꞏ 3y
  • AES ꞏ 3y
  • AVX ꞏ 3y
  • architecture simulation ꞏ 3y
  • TI microprocessors ꞏ 2y
  • interrupt level-processing ꞏ 2y
  • Network processing units ꞏ 2y
  • image processing control software ꞏ 2y
  • RTOS ꞏ 2y
  • embedded C ꞏ 2y
  • algorithmic pipeline development ꞏ 2y
  • high capacity optical MPLS ꞏ 2y
  • ethernet switches ꞏ 2y
  • routing ꞏ 2y
  • fault tolerance ꞏ 2y
  • embedded C++ ꞏ 2y
  • OS mechanisms ꞏ 2y
  • HW acceleration ꞏ 2y
  • data plane features ꞏ 2y
  • HW drivers ꞏ 2y
  • APIs/queues/IoT brokers/databases
  • modeling
  • simulations
  • SIMD/AVX
  • emulations
  • FPGA/ASICs
  • Embedded/ Low-latency
  • Solidity
  • 14-17
  • templates
Education
  • B.Sc. (cum laude) Physics and Computer Science, Bar Ilan University
  • M.Sc., Computer Science, Bar Ilan University
  • MBA, Financial Engineering, York University – Schulich school of business
Soft Skills
  • multidisciplinary thinking
  • team management
  • concept development
  • architecture planning
  • remote team management
  • presentation skills
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